Interconnects competition

During my PhD studies I contributed was part of the Enzian Research Project where I:

  1. contributed to the “Enzian: An Open, General, CPU/FPGA Platform for Systems Software Research”

  2. was the author of Rethinking Programmed I/O for Fast Devices, Cheap Cores, and Coherent Interconnects

  3. presented a poster Exploring cache-coherent interconnects with CCKit and Enzian at Symposium on Operating Systems Principles (SOSP, 2023)

  4. supervised several students, listed in the Student projects