HVDS is a multi-computer program suite. The topological input of the device structure together with the physical device parameters are entered through an IBM-PC/AT (or compatible) by use of a graphical input package (AutoCad). A preprocessor (residing on the PC) condenses the data file produced by AutoCad to minimize the inter-computer data transfer time. A second preprocessor (residing on a VAX/VMS system) merges the topological input description that was shipped over from the PC with the doping profile which is automatically extracted from SUPREM-III (process simulation) output files, and generates the required input data to drive the device simulator which can reside either on the VAX/VMS system, or preferably on an FPS-164 array processor. The device simulator generates data describing the potential and electric field distributions inside the device. These data are shipped back to the VAX for postprocessing. A graphical postprocessor (TechGra) which can reside either on the VAX/VMS system or the PC/AT is then used to present the data obtained by the device simulation in a graphical form.