CAB E 77.2
+41 44 632 8037
I am interested in making data processing faster and more efficient in terms of resource and power usage. To achieve this, I am designing specialized hardware performing inherently parallel and compute/data intensive tasks that a conventional CPU is not suitable for. I am prototyping my designs on shared memory heterogeneous architectures combining CPUs and FPGAs.
My goal is to provide insights into how the evolution of hardware in the era of big data shall continue after the end of Moore's Law. One general purpose approach can be the integration of an FPGA onto the CPU die, which then can be flexibly utilized to perform compute intensive tasks depending on the application. A more specialized approach is to develop processors with hardened macro circuits dedicated to each task to be accelerated, resulting in a highly heterogenous architecture.