Rahul bera
Rahul bera
Ph.D. Student and Scientific Assistant
Ph.D. Student and Scientific Assistant
SAFARI Research Group, ETH Zürich
SAFARI Research Group, ETH Zürich
I am a Ph.D. student advised by Prof. Onur Mutlu and a member of SAFARI Research Group at ETH Zürich. Previously I have worked as an Architecture Researcher in Intel Processor Architecture Research Lab (PARL), India under the mentorship of Anant V. Nori and Sreenivas Subramoney. I completed my master's from IIT Kanpur where I worked with Prof. Mainak Chaudhuri on aggressive prefetcher optimization. I'm interested in the broad area of memory hierarchy design and energy-efficient architectures.
Experience
Experience
- Research Intern, Intel Processor Architecture Research Lab, India [April - Aug 2023]
- Architecture Researcher, Intel Processor Architecture Research Lab, India [Feb 2017 - Aug 2019]
Aggressive prefetcher design and optimization for next generation processor
Near-cache computing for efficient DNN inference in CPU
- Co-op Engineer, Server SoC Perf Team, AMD India, Bangalore [July - Dec 2015]
Designing a simulation framework alternative to instruction-based tracing for to evaluate extrmely-threaded workloads
Education
Education
- Doctor of Philosophy [Sept 2019 - Present]
- Master of Technology in Computer Science [July 2014 - Jan 2017]
- Bachelor of Enginnering in Computer Science [July 2010 - April 2014]
