Distinguished artifact award at MICRO 2023.
"Victima: Drastically Increasing Address Translation Reach by Leveraging Underutilized Cache Resources"
Source Code
Five papers selected to to the ISCA-50 25-Year Retrospective Issue covering 1996-2020 in 2023.
"A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing" (ISCA 2015)
Retrospective
"Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors" (ISCA 2014)
Retrospective
"An Experimental Study of Data Retention Behavior in Modern DRAM Devices: Implications for Retention Time Profiling Mechanisms" (ISCA 2013)
Retrospective
"RAIDR: Retention-Aware Intelligent DRAM Refresh" (ISCA 2012)
Retrospective
"Self Optimizing Memory Controllers: A Reinforcement Learning Approach" (ISCA 2008)
Retrospective
Distinguished artifact award at ISCA 2023.
"RowPress: Amplifying Read Disturbance in Modern DRAM Chips"
Source Code
National Technical University of Athens (NTUA) Best Doctoral Thesis Award (for PhD Graduate Christina Giannoula), 2023.
"Accelerating Irregular Applications via Efficient Synchronization and Data Access Techniques" Slides (pptx) (pdf) Dissertation Seminar Video
Huawei OlympusMons Award, 2023.
Award Announcement (in English) (in Chinese)
Citation: "For outstanding achievements on Data-Centric & Data-Driven Storage System Design for High Performance, Efficiency and Reliability."
European Design and Automation Association (EDAA) Outstanding Dissertation Award (for PhD Graduate Hasan Hassan), 2023.
"Improving DRAM Performance, Reliability, and Security by Rigorously Understanding Intrinsic DRAM Operation" Slides (pptx) (pdf) Dissertation Seminar Video
Google Open Source Peer Bonus Award, 2023.
For contributions to the educational YouTube channel Onur Mutlu Lectures
Best paper session at ISPASS 2023.
"Evaluating Machine Learning Workloads on Memory-Centric Computing Systems"
Slides (pptx) (pdf)
Best artifact award at PPoPP 2023.
"High-Performance and Scalable Agent-Based Simulation with BioDynaMo"
Source Code
Best paper award at HiPEAC 2023.
"MetaSys: A Practical Open-source Metadata Management System to Implement and Evaluate Cross-layer Optimizations"
Source Code Slides (pptx) (pdf) Talk Video
Best paper award at MICRO 2022.
"Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load Prediction"
Source Code Slides (pptx) (pdf) Talk Video
Best paper award at SC 2022.
"ProbGraph: High-Performance and High-Accuracy Graph Mining with Probabilistic Set Representations"
Source Code Slides (pdf) Talk Video
Google Security and Privacy Research Award, 2022.
Intel Hardware Security Academic Award Finalist, 2022.
For the HPCA 2021 paper "BlockHammer: Preventing RowHammer at Low Cost
by Blacklisting Rapidly-Accessed DRAM Rows" Source Code Award Talk Video Slides (pptx) (pdf)
ETH Doctoral Medal for Outstanding Dissertation (for PhD Graduate Minesh Patel), 2022.
"Enabling Effective Error Mitigation in Memory Chips That Use On-Die Error-Correcting Codes" Award Acceptance Speech Video Slides (pptx) (pdf)
William C. Carter PhD Dissertation Award in Dependability (for PhD Graduate Minesh Patel), 2022.
"Enabling Effective Error Mitigation in Memory Chips That Use On-Die Error-Correcting Codes" Award Acceptance Speech Video Slides (pptx) (pdf)
Persistent Impact Prize (of the Non-Volatile Memory Systems Workshop), 2022.
For the ISCA 2009 paper "Architecting Phase Change Memory as a Scalable DRAM Alternative" Slides (pdf)
Citation: "Architecting Phase Change Memory as a Scalable DRAM Alternative" is awarded the Persistent Impact Prize in recognition of its seminal contribution to understanding how non-volatile memories might replace conventional DRAM. It also played a critical role in introducing Phase Change Memory (PCM) technology to the architecture community, spawning a wide range of follow-on work.”
Intel Outstanding Researcher Award, 2022.
Intel Press Release
Citation: "Professor Onur Mutlu’s emerging-workload-driven research has led to open-source benchmark suites that help hardware-software co-design and exploration for near-memory architectures. His team’s research has also led to innovative near-memory architectures for deep learning and genomics applications."
IEEE High-Performance Computer Architecture Symposium (HPCA) Test of Time Award, 2021.
For the HPCA 2003 paper "Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-order Processors" Award Talk Slides (pptx) (pdf) Award Talk Video
Citation: "Runahead Execution is a pioneering paper that opened up new avenues in dynamic prefetching. The basic idea of run ahead execution effectively increases the instruction window very significantly, without having to increase physical resource size (e.g. the issue queue). This seminal paper spawned off a new area of ILP-enhancing microarchitecture research. This work has had strong industry impact as evidenced by IBM's POWER6 - Load Lookahead, NVIDIA Denver, and Sun ROCK's hardware scouting."
European Design and Automation Association (EDAA) Outstanding Dissertation Award (for PhD Graduate Jeremie Kim), 2021.
"Improving DRAM Performance, Security, and Reliability by Understanding and Exploiting DRAM Timing Parameter Margins" Slides (pptx) (pdf)
Pwnie Award 2020 for Most Innovative Research, 2020.
"TRRespass: Exploiting the Many Sides of Target Row Refresh" Slides (pptx) (pdf) Lecture Video
Best paper award at MICRO 2020.
"Bit-Exact ECC Recovery (BEER): Determining DRAM On-Die ECC Functions by Exploiting DRAM Data Retention Characteristics" Source Code Slides (pptx) (pdf) Talk Video
Best paper award at IEEE S&P 2020.
"TRRespass: Exploiting the Many Sides of Target Row Refresh" Slides (pptx) (pdf) Lecture Video
IEEE Micro Top Pick Honorable Mention Selection for paper published in 2020.
"TRRespass: Exploiting the Many Sides of Target Row Refresh" Slides (pptx) (pdf) Lecture Video
IEEE Computer Society Edward J. McCluskey Technical Achievement Award, "for innovative and impactful contributions to computer memory systems", 2020.
Award Video
ACM SIGARCH Maurice Wilkes Award, "for innovative contributions in efficient and secure DRAM systems", 2019.
Award Interview Award Speech
Best paper award at DSN 2019.
"Understanding and Modeling On-Die Error Correction in Modern DRAM: An Experimental Study Using Real Devices" Source Code Slides (pptx) (pdf) Talk Video
RowHammer paper selected as a "Top Pick in Hardware and Embedded Security" (as one of 7 published in 2012-2017 in the area), 2019.
Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors Source Code Slides (pptx) (pdf)
Facebook AI System Hardware/Software Co-Design Research Award, 2019.
Google Faculty Research Award, 2019.
Selected to the Computer Architecture Aggregated Hall-of-Fame, 2019.
Semiconductor Research Corporation (SRC) Best Student Presentation Award at SRC TECHCON 2019 (for PhD Student Damla Senol Cali), 2019.
"GenASM: A High-Performance, Low-Power Approximate String Matching Acceleration Framework for Genome Sequence Analysis"" Slides (pptx) (pdf)
IEEE Micro Top Pick Honorable Mention Selection for paper published in 2019.
"D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput" Slides (pptx) (pdf) Lecture Video
IEEE Fellow, elected "for contributions to computer architecture research and practice", 2018.
Member of Academia Europaea (The Academy of Europe), elected "for outstanding achievements as a researcher", 2018.
Selected to the ASPLOS Hall of Fame, 2018.
IEEE Turkey Ph.D. Dissertation Award for Ph.D. Student Mohammed Alser, 2018.
PhD Thesis: "Accelerating the Understanding of Life's Code Through Better Algorithms and Hardware Design" Slides (pptx) (pdf)
Semiconductor Research Corporation (SRC) Best Student Presentation Award at SRC TECHCON 2018 (for PhD Student Amirali Boroumand), 2018.
"Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks" Slides (pptx) (pdf)
ACM Fellow, elected "for contributions to computer architecture research, especially in memory systems", 2017.
Best paper award at DFRWS-EU 2017.
"Improving the Reliability of Chip-Off Forensic Analysis of NAND Flash Memory Devices"
Slides (pptx) (pdf)
Google Faculty Research Award, 2016.
Best paper session at MICRO 2016.
"Continuous Runahead: Transparent Hardware Acceleration for Memory Intensive Workloads"
Slides (pptx) (pdf)
Semiconductor Research Corporation (SRC) Best in Session Award at SRC TECHCON 2016 (for PhD Student Kevin Chang), 2016.
"Understanding Latency Variation in Modern DRAM Chips: Experimental Characterization, Analysis, and Optimization"
Slides (pptx) (pdf)
IEEE Micro Top Pick Honorable Mention Selection for paper published in 2015.
"A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing" Slides (pptx) (pdf)
Google Faculty Research Award, 2015.
Best paper runner-up at HPCA 2015.
Data Retention in MLC NAND Flash Memory: Characterization, Optimization and Recovery
Slides (pptx) (pdf)
Best (student) presentation award at HiPEAC 2015 (for PhD Student Justin Meza).
Efficient Data Mapping and Buffering Techniques for Multi-Level Cell Phase-Change Memories
Slides (ppt) (pdf)
Google Faculty Research Award, 2014.
Microsoft Research Software Engineering Innovation Foundation (SEIF) Award, 2014.
Best paper award at RTAS 2014.
Bounding Memory Interference Delay in COTS-based Multi-Core Systems
Slides (pptx) (pdf)
Best Paper Session at HPCA 2014.
Improving Cache Performance by Exploiting Read-Write Disparity Slides (pptx) (pdf)
Dr. William D. and Nancy W. Strecker Early Career Professorship, January 2013.
IBM Faculty Partnership Award, 2013.
Selected to the HPCA Hall of Fame, 2013.
Intel Early Career Faculty Honor Program Award, 2012.
IEEE Computer Society Technical Committee on Computer Architecture Young Computer Architect Award, 2011.
Carnegie Mellon University College of Engineering George Tallman Ladd Research Award, 2012.
IBM Faculty Partnership Award, 2012.
Hewlett-Packard Laboratories Innovation Research Program Award, 2012.
Nvidia CUDA Center of Excellence Award, 2012. (Center led by Kayvon Fatahalian)
Best paper award at ICCD 2012 (Computer Systems and Applications Track), 2012.
Best paper award at ASPLOS 2010.
Best paper award at VTS 2010 (awarded in 2011). One paper (of 12 total) selected for IEEE Micro's "Top Picks from Computer Architecture Conferences," 2011. Three papers (of 11 total) selected for IEEE Micro's "Top Picks from Computer Architecture Conferences," 2010.
Two papers (of 13 total) selected for IEEE Micro's "Top Picks from Computer Architecture Conferences," 2009.
One paper (of 12 total) selected for IEEE Micro's "Top Picks from Computer Architecture Conferences," 2008.
One paper (of 11 total) selected for IEEE Micro's "Top Picks from Computer Architecture Conferences," 2006.
Two papers (of 13 total) selected for IEEE Micro's "Top Picks from Computer Architecture Conferences," 2005.
One paper (of 15 total) selected for IEEE Micro's "Top Picks from Computer Architecture Conferences," 2003.
One paper selected for CACM's "Research Highlights," 2009.
Best Paper Session at HPCA 2010.
Best Paper Session at HPCA 2009.
Best paper award nominations at ISPASS 2023, FPL 2020, MICRO 2016, NOCS 2015, HPCA 2015, HPCA 2014, NOCS 2012, HPCA 2010, HPCA 2009, HPCA 2007, MICRO 2006, and MICRO 2005 conferences.
Selected to the ISCA Hall of Fame, 2009.
Selected to the MICRO Hall of Fame, 2009.
NSF CAREER Award, 2010.
Microsoft Gold Star Award, 2008.
PhD Dissertation nominated by UT-Austin for the ACM Doctoral Dissertation Award, 2006.
University Co-op/George H. Mitchell Award for Excellence in Graduate Research (Awarded to 6 out of 271 nominees at UT-Austin), 2005.
Intel Foundation Ph.D. Fellowship, 2004.
University of Texas Graduate School Continuing Fellowship, 2003.
University of Michigan EECS Dept. Summer Research Fellowship, 1999, 2000.
University of Michigan EECS Dept. William Harvey Seeley Award (award given to the top undergraduate junior), 1999.
University of Michigan Branstrom Freshman Prize, 1998.
Row Buffer Locality Aware Caching Policies for Hybrid Memories Slides (pptx) (pdf)
Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems Slides (pdf)
Concurrent Autonomous Self-Test for Uncore Components in System-on-Chips Slides (ppt)
Kilo-NOC: A Heterogeneous Network-on-Chip Architecture for Scalability and Service Guarantees Slides (pptx)
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior Slides (pptx) (pdf)
Aergia: Exploiting Packet Latency Slack in On-Chip Networks Slides (pptx)
Data Marshaling for Multi-core Architectures Slides (ppt)
Accelerating Critical Section Execution with
Asymmetric Multi-Core
Architectures Slides (ppt)
Architecting Phase Change Memory as a Scalable
DRAM Alternative
Slides (pdf)
Parallelism-Aware Batch Scheduling: Enabling
High-Performance and Fair Memory Controllers
Slides (ppt)
Diverge-Merge Processor (DMP): Generalized and
Energy-Efficient Dynamic Predication
Slides (ppt)
Efficient Runahead Execution: Power-efficient
Memory Latency Tolerance
Slides (ppt)
Wish Branches: Enabling Adaptive and Aggressive
Predicated Execution
Slides (ppt)
Runahead Execution: An Effective Alternative
to Large Instruction Windows
Slides (pdf)
Architecting Phase Change Memory as a Scalable
DRAM Alternative
Slides (pdf)
ATLAS: A Scalable and High-Performance
Scheduling Algorithm for Multiple Memory Controllers
Slides (pptx)
Techniques for Bandwidth-Efficient
Prefetching of Linked Data Structures in Hybrid Prefetching Systems
Slides (ppt)
QoS-Aware, High-Performance, and Scalable Many-Core Memory Systems
"Efficient Runahead Execution Processors" Slides (ppt)