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Memory Systems and Memory-Centric Computing Systems
(HiPEAC ACACES Summer School 2018)

This webpage hosts materials (both preliminary and final) for the Memory Systems course I taught at the HiPEAC ACACES Summer School during July 9-13, 2018.

Final Slides

The following are the slides covered in each lecture.

Course Abstract

Link to course information at the HiPEAC ACACES Summer School 2018 webpage

The memory system is a fundamental performance and energy bottleneck in almost all computing systems. Recent system design, application, and technology trends that require more capacity, bandwidth, efficiency, and predictability out of the memory system make it an even more important system bottleneck. At the same time, DRAM and flash technologies are experiencing difficult technology scaling challenges that make the maintenance and enhancement of their capacity, energy efficiency, performance, and reliability significantly more costly with conventional techniques. In fact, recent reliability issues with DRAM, such as the RowHammer problem, are already threatening system security and predictability. We are at the challenging intersection where issues in memory reliability and performance are tightly coupled with not only system cost and energy efficiency but also system security.

In this course, we first discuss major challenges facing modern memory systems (and the computing platforms we currently design around the memory system) in the presence of greatly increasing demand for data and its fast analysis. We then examine some promising research and design directions to overcome these challenges. We discuss at least three key topics in detail, focusing on both open problems and potential solution directions: 1) fundamental issues in memory reliability and security and how to enable fundamentally secure, reliable, safe architectures; 2) enabling data-centric and hence fundamentally energy-efficient architectures that are capable of performing computation near data; 3) reducing both latency and energy consumption by tackling the fixed-latency/energy mindset.

If time permits, we will also discuss research challenges and opportunities in enabling emerging NVM (non-volatile memory) technologies and scaling NAND flash memory and SSDs (solid state drives) into the future.

Overview Readings

The readings below are strongly recommended for attendees of the course. Lectures will revolve around the topics outlined in these readings.

Preliminary Slides

The following are the tentative set of slides we will cover in this course. Note that not all slides will be covered.

The slides include links and references to readings and videos associated with each topic.

We will cover four major topics:

We will very likely not cover the following two major topics in detail, but likely provide slides for your benefit.

Background Lecture Videos and Course Materials

I would suggest reviewing materials from the following courses. Review of especially basics of computer architecture would be useful. Latest edition of each course is recommended (2018 for Digital Circuits and Computer Architecture, 2017 for Graduate Computer Architecture, and 2015 for Undergraduate Computer Architecture).

Links to Background Lecture Videos

You may find the following lecture videos useful as background information:

Extended Reading List

Most of the readings we will touch on are provided in the preliminary slides above. You can find most readings here.

As time permits, other covered or mentioned readings will be provided on this page.

Readings for Topic 1 (Memory Trends and Basics)

DRAM Basics

DRAM Refresh

Simulating Memory

Memory Control

Readings for Topic 2 (Memory Reliability and Security)


Large-Scale Memory Reliability Studies

DRAM Testing Infrastructure

DRAM Refresh and Data Retention

Heterogeneous Reiability Memory

Readings for Topic 3 (In-Memory Computation)

Runahead Execution

Data Movement Cost in Mobile Devices

In-DRAM Computation and Data Movement

Processing in 3D-Stacked Memory and Memory Controllers

Coherence Support

Data Structures for In-Memory Computation

Simulation Infrastructures for In-Memory Computation

New Applications and Use Cases for In-Memory Computation

Enabling Adoption of In-Memory Computation

Readings for Topic 4 (Low-Latency Memory)

Tackling the Fixed-Latency Mindset

Exploiting the Latency-Voltage-Reliability Tradeoffs for Energy and Security

Reducing Refresh Latency

Low-Latency Memory Architectures

Memory Power Consumption and Modeling